1. Technical Field
This disclosure relates to semiconductor devices and more particularly, to a semiconductor device employing wordline boost voltages (VPP) for programming electrical fuses.
2. Description of the Related Art
For redundancy activation and trimming purposes, semiconductor memory devices include a plurality of fuses. Typically, these fuses are programmed by a laser beam at the wafer-level; however, new types of fuses are electrically programmable and permit programming in a packaged chip.
The level of the programming voltage for the fuses is typically far above the external supply voltage or any internally generated voltage (e.g., 9.0V-12.0V).
The maximum voltage level that can be achieved by a high voltage pump circuit depends on the pump circuit type and the available supply voltage from which the programming voltage is generated by the pump. A formula for a typical pump circuit is: EQU V.sub.FUSE =3.times.V.sub.SUP -3.0V.
This means that the maximum achievable fuse programming voltage is three times the supply voltage from which it is generated minus a constant voltage drop of 3.0V, due to internal losses in the pump circuit.
Usually the voltage pump is supplied by the external chip supply voltage, V.sub.DD. For current semiconductor technologies V.sub.DD is about 2.5V. During the burn-in phase of the chip, this voltage is raised by a certain factor (e.g., 1.5). This leads to a 150% increase of all internal voltages on the chip for increased stress of all circuits in order to accelerate early defects.
According to the above formula this permits a fuse programming voltage of: EQU V.sub.FUSE =3.times.(1.5.times.2.5V)-3.0V.times.8.25V.
This voltage level is not high enough for programming the fuses. Raising V.sub.DD to a higher level would permit the pump circuit to reach a higher output level, but would also expose all other circuits on the chip to a voltage stress that is above their reliability.
Therefore, a need exists to achieve a voltage level for programming electrical fuses in a memory device with an on-chip pump circuit without raising the external supply voltage (e.g., V.sub.DD) above a level which would affect the reliability of circuits which employ the external supply voltage.